Eduardo Augusto Bezerra, PhD
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Eduardo Augusto Bezerra, PhD |
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Fall 2005/2
Catholic
University of RS (PUCRS), Informatics
Faculty/PPGCC
Prof. Eduardo Bezerra
Term project definition: design and implementation of testing processes for SOC components (e.g. microprocessors and memories) implemented in SRAM based FPGAS.
Group I - "Functional testing of microprocessors". Aline, Carlos and Rosana.
Definition and selection of an abstract execution graph for each instruction of the microprocessor under test (Cleo?).
Using the structural method for graph analysis shown in class, define and select a minimun set of instructions for the test.
Using the functional method for graph analysis shown in class, define and select the set of instructions needed to increase the test coverage.
Define the minimun instrucion set and the sequence of instructions (assembly program) to be used for performing the microprocessor's testing.
Technical report writing up (to be added to the paper).
Group II - "Memory testing, test execution and management". Marcio, Gabriel and Ries.
Design and implementation of a program for performing the transparent test algorithm discussed in class for the memory testing.
Define a case study architecture (e.g. 2 processors + memory connected through a bus), and implement a couple of simple applications to run on this platform. Download and test everything using an SRAM based FPGA
Test management: definition of a strategy for performing a microprocessors' self-test, as well as the memory testing, in a periodic way. Define the mechanism for triggering the testing processes.
Define a strategy for fault injection and for the test execution. For instance, perform the download of a faulty microprocessor between two testing executions.
Technical report writing up (to be added to the paper).